library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.processor_types.all;

entity processor is
    port (
        clock : in std_ulogic;
        reset : in std_ulogic;
        d_busout : out std_logic_vector(31 downto 0);
        d_busin : in std_logic_vector(31 downto 0);
        a_bus : out std_logic_vector(31 downto 0);
        write : out std_ulogic;
        read : out std_ulogic;
        ready : in std_ulogic;
		done : out std_ulogic;
		res : out std_logic_vector(31 downto 0)
    );
end processor;